D. Chillet, A. Eiche, S. Pillement, and O. Sentieys, Real-time scheduling on heterogeneous system-on-chip architectures using an optimised artificial neural network, Journal of Systems Architecture, vol.57, issue.4, pp.340-353, 2011.
DOI : 10.1016/j.sysarc.2011.01.004

URL : https://hal.archives-ouvertes.fr/hal-00650650

J. J. Hopfield and D. W. Tank, Neural' Computation of Decisions in Optimization Problem, Biol.Cybern, vol.52, pp.141-152, 1985.

J. J. Hopfield, Neural networks and physical systems with emergent collective computational abilities, Proc. Natl. Acad. Sci.USA, pp.2554-2558, 1982.

B. M. Forrest, D. Roweth, N. Stroud, D. J. Wallace, and G. V. Wilson, Implementing Neural Network Models on Parallel Computers, The Computer Journal, vol.30, issue.5, 1987.
DOI : 10.1093/comjnl/30.5.413

T. Nordstrom and B. Svensson, Using and designing massively parallel computers for artificial neural networks, Journal of Parallel and Distributed Computing, vol.14, issue.3, pp.260-285, 1992.
DOI : 10.1016/0743-7315(92)90068-X

F. Valafar and O. K. Ersoy, A Parallel Implementation of Backprogagation Neural Network On MASPAR MP-1, ECE Tchinical Reports. Paper, vol.223, 1993.

B. Nikola and . Serbedzija, Simulating Artificial Neural Networks on Parallel Architectures, Computer, vol.29, issue.3, pp.56-63, 1996.

U. Seiffert, Artificial neural networks on massively parallel computer hardware, ESANN'2002 proceedings-European Symposium on Artificial Neural Networks Bruges(Belgium), 2002.
DOI : 10.1016/j.neucom.2004.01.011

J. M. Dutt, N. Krichmar, J. L. Nicolau, A. Veidenbaum, and A. , Efficient simulation of large-scale spiking neural networks using CUDA graphics processors, International conference on neural networks, 2009.

R. Dolan and G. Desouza, GPU-based simulation of cellular neural networks for image processing, 2009 International Joint Conference on Neural Networks, 2009.
DOI : 10.1109/IJCNN.2009.5178969

A. Guzhva, S. Dolenko, and I. Persiantsev, Multifold Acceleration of Neural Network Computations Using GPU, Part I, LNCS 5768, pp.373-380, 2009.
DOI : 10.1016/j.patcog.2004.01.013

N. Lopes and B. Ribeiro, GPU Implementation of the Multiple Back-Propagation Algorithm, IDEAL 2009, pp.449-456, 2009.
DOI : 10.1016/j.jpdc.2008.05.014

L. Daniel, V. Ly, D. Paprotski, and . Yen, Neural Networks on GPUs: Restricted Boltzmann Machines, 2010.

N. Bell and M. Garland, Efficient Sparse Matrix-Vector Multiplication on CUDA, 2008.

Y. Dotsenko, N. K. Govindaraju, P. Sloan, C. Boyd, and J. Manferdelli, Fast Scan Algorihms On Graphics Processors, ICS '08 : Proceedings of the 22nd annual International Conference on Supercomputing, pp.205-213, 2008.
DOI : 10.1145/1375527.1375559

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.192.9474

J. Bolz, I. Farmer, E. Grinspun, and P. Schroder, Sparse Matrix Solvers on the GPU : Conjugate Gradients and Multigrid, ACM TRANSACTIONS OF GRAPH- ICS, 2003.

A. Monakov and A. Avetisyan, Implementing Blocked Sparse Matrix-Vector Multiplication on NVDIA GPUs, SAMOS 2009, pp.289-297, 2009.

A. Monakov, A. Lokhmotov, and A. Avetisyan, Automatically Tuning Sparse Matrix-Vector Multiplication for GPU Architectures, HiPEAC 2010, pp.111-125, 2010.
DOI : 10.1007/978-3-642-11515-8_10

M. Sander and . Bohte, Spiking Neural Networks Thesis Universiteit Leiden, 2003.

E. David, . Culler, and . Singh, Parallel computer architecture : a hardware/software approach, 1999.

D. Scherer, H. Schulz, and S. Behnke, Accelerating Large-Scale Convolutional Neural Networks with Parallel Graphics Multiprocessors, Part III, pp.82-91
DOI : 10.1007/978-3-642-15825-4_9

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.156.4398

B. Krose and P. Van-der-smagt, Introduction to Neural Networks, pp.50-52, 1996.
DOI : 10.1007/978-1-4471-7296-3_2

I. Benkermi, PhD Thesis : Modele et algorithme d'ordonnancement pour architectures reconfigurables dynamiquement

G. A. Tagliarini, J. Christ, and E. W. Page, Optimization using neural networks, IEEE Transactions on Computers, vol.40, issue.12, 1991.
DOI : 10.1109/12.106220

H. Jang, A. Park, and K. Jung, Neural Network Implementation Using CUDA and OpenMP, 2008 Digital Image Computing: Techniques and Applications
DOI : 10.1109/DICTA.2008.82

K. Oh and K. Jung, GPU implementation of neural networks, Pattern Recognition, vol.37, issue.6, 2004.
DOI : 10.1016/j.patcog.2004.01.013

D. Chillet, S. Pillement, and O. Sentieys, Ordonnancement de taches par rseaux de neurones pour architectures de soc htrognes, Traitement du signal, vol.26, issue.1, pp.77-89, 2009.

J. Misra and I. Saha, Artificial neuralnetworksinhardware: A survey of two decades of progress, pp.74239-255, 2010.

Z. He and K. Harada, Balance Algorithm for Point-Feature Label Placement Problem, ICANN 2005, pp.179-184, 2005.
DOI : 10.1007/11550822_29

J. Christensen, An empirical study of algorithms for point-feature label placement, ACM Transactions on Graphics, vol.14, issue.3, pp.203-232, 1995.
DOI : 10.1145/212332.212334